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Virtual Platforms – White Knight or Red Herring?

The rapid evolution of embedded system requirements has continued to drive engineering organizations to consider new tools and technologies in order to speed time-to-market and mitigate the growing complexity of the target systems.  Just as engineers gradually embraced graphical development environments over standalone, command-line tools, we have begun to see an increase in the adoption of virtual system prototyping/simulation (VSPS) tools in the embedded market with the use rate in 2010 up 60% over 2007 levels.


Earlier in the year, we saw a large amount of activity surrounding virtual platforms with the acquisitions of CoWare (by Synopsys), VaST (also by Synopsys), and Virtutech (by Intel/Wind River). So we have already written about the potential benefits of these solutions, but what are we actually hearing from the engineering community?

First off, it is clear that the engineers using these tools are working on more complex projects.  With one of the main value propositions to embedded system engineering companies being the supposed ability to accelerate software design ahead of final silicon availability, it should be no surprise that our research indicates that engineers using VSPS tools are greater than 40% more likely to be using a multicore processor in their current design than the overall respondent base.  Additionally, VSPS tool users also reported projects with an average total cost of development over 3.5 times greater than the average embedded project. 

So maybe the engineers with more expensive, more complex projects are using the tools in greater frequencies – but does that mean that they are actually helping their team’s performance?  Maybe.  May be not.

Some engineers, however, seem to think so.  In research we published at the beginning of this year, engineers using VSPS tools rated the tools as having a higher Return on Investment than any other 14 types of tools rated.

But, again, even if engineers like the products, do they actually help project performance? 

Our research shows that projects using VSPS tools were reported to be late at approximately the same rate as within the embedded market as a whole (a dismal 43.4% versus 42.7%, respectively).  While it is certainly possible that projects using VSPS could have been more late without their use due to the level of complexity attributable to other project factors and requirements, the difficulty associated with using another, new tool could have also unnecessarily delayed the project as well.

Perhaps the only uncontestable take-away from the aforementioned statistics is that the development processes currently in place in many engineering organizations are struggling to enable the project teams’ success.  Of course the advent of new tool technologies can help accelerate certain engineering tasks. However, as embedded system requirements become increasingly sophisticated, embedded engineering organizations would be remiss not to reevaluate their current design methodologies in parallel with their tooling in order to best position themselves to address the engineering challenges facing them over the longer term.

Our recently published report, Development Tools, from Track 2 of VDC's 2010 Embedded Software Market Intelligence Service provides additional statistical insight and analysis around this and other trends affecting embedded system development.  Click Here for additional information and access to a free executive brief highlighting other key findings from our research.

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