VDC Launches Study on Electronic Systems Level (ESL) Tools

VDC has launched its 2006 global market analysis of Electronic Systems Level (ESL) Tools. This study will provide answers to critical questions about the competitive landscape, customer requirements, profitability, and strategy within the ESL space. VDC currently defines ESL as a development methodology using abstract modeling or system description language (often on a higher level than RTL) to design an embedded system. ESL tools can be used to design, prototype, verify, debug, and virtually simulate embedded hardware and systems. These tools are often used in the development of SoC and/or multiprocessor architectures, and may also enable the advanced development of... Read more →